Agenda：Online Event

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Join the 2026 TSMC Open Innovation Platform Ecosystem Forum and learn from OIP partners how to leverage their technology for your design challenges!

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Date: Thursday, November 26, 2026

Plenary Session
Welcome & Ecosystem Pavilion
Opening Remarks
TSMC Keynote & Guest Speech

Included All In-Person Papers

Advanced Logic & 3D IC Track

ATPG Solutions for Small-delay Defects -- Path-Delay vs Timing-Aware

Siemens EDA / AMD

An Innovative IR-ECO Technique Enabling Fast Design Convergence for High-End SoC

Synopsys / Sanechips

A Novel Algorithm-Based Approach to Accelerating IR-STA Flow

Synopsys / NXP Semiconductors

A Distributed and Scalable Dynamic Power Integrity Flow from Early Analysis to Sign-off for Large-Scale SerDes Designs

Synopsys / Sanechips Technology

Transforming DRC from a Static Run to an Intelligent, Agentic Experience with Calibre and Fuse AI

Siemens EDA

Trust but Verify: Microsoft's IP Validation Methodology Across Design Views and Revisions on TSMC 3nm

Siemens EDA / Microsoft

Bridging the Thermal Divide: Empowering ASIC Designers with an Automated Model Generation Toolbox for Thermal-Aware Design

HCL Technologies / A semiconductor organization in power and image sensing products

PFSC ESD full chip and 3DIC successful usage

Synopsys

How Tempus™ PDK Timing Prediction Achieves Timing Signoff Accuracy on TSMC N2P

Cadence Design Systems / Broadcom

Taping out multi-billion-gate, advanced process node SoC with IC Validator

Synopsys / Nvidia

Backside Methodology for AI/HPC on TSMC A16/A12 using Synopsys Fusion Compiler

Synopsys

Next-Gen Verification: Overcoming ERC and SOFTCHK Challenges for Faster Design Iterations

Siemens EDA / SanDisk

From Design to Mass Production: GUC and FuriosaAI’s Joint Collaboration on RNGD

GUC / FuriosaAI

From C4 to Hybrid in Photonic Integrated Circuit: Routing-Centric Constraints for Power/Ground in 3D-Integrated Platforms

Synopsys

Simulate of TSMC COUPE Optical I/O Chip-to-Fiber Coupling System by Keysight's Optical Tools

Keysight Technolgies, Inc. / Keysight Technoligies / Keysight Technoligies

Warpage Simulation Fitting, Stress Simulation Method and Glass Core Substrate Application of Advanced Package for AI Chips

Synopsys / Iluvatar CoreX

Enhancing Thermal Aware Optimization for 3D Heterogeneous Chiplets Integration: A System- Technology Co-Optimization (STCO) Perspective on Spatial-Temporal Temperature Uniformity

Synopsys / Witmem

EMIR Signoff Methodology and Novel Models for Custom HBM

Synopsys / Synopsys / Synopsys

Enabling AI-Optimized Memory Subsystems with LPDDR6/5X and SOCAMM-Based Architectures

Cadence Design Systems / Cadence Design Systems

Synopsys–GUC Ecosystem for Optical I/O in 3DIC CPO Architectures

Synopsys / GUC

Addressing Inter-Die STA Complexity for 3D Multi-Die Designs

Synopsys / Arm

Demonstrating Synopsys Lane Test & Repair on TSMC Light IOs for Vertical 3DIC Solutions

Synopsys / TSMC
Analog, RF, Specialty Track

Catching SOA Violations in Over-Voltage-Tolerant (OVT) GPIOs on Advanced FinFET Nodes

Sofics / Siemens EDA

*The agenda is subject to change by TSMC.

Legal Notice

TSMC is not responsible for the content, accuracy, or reliability of any of the presentations at the TSMC Open Innovation Platform Ecosystem Forum. Furthermore, posting the presentation abstracts on TSMC's corporate website does not constitute an endorsement of the content of those presentations by TSMC. Any liability arising from the contents of any of the presentations is the responsibility of the presenter itself, and not TSMC.

The views expressed in the presentations made at this event are those of the speaker and are not necessarily those of TSMC.