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3D IC Track
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From Design to Mass Production: GUC and FuriosaAI’s Joint Collaboration on RNGD
GUC / FuriosaAI
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Abstract
The seamless collaboration between FuriosaAI and GUC enabled a historic one-shot silicon success, allowing RNGD to move directly into mass production.
A key enabler was accelerated software readiness and verification. By leveraging ZeBu, the team was able to identify and resolve critical issues before tape-out, while HAPS ensured that the software stack was ready by the time the evaluation board was delivered.
The collaboration also delivered strong HBM signal and power reliability. Stable HBM integration was validated through an eye diagram of over 0.76UI at the HBM PHY-to-DRAM RX I/O pads, while voltage ripple was effectively controlled, with Vpp suppressed to 3.65% at 0.4V and 7.48% at 0.75V during HBM operations.
In addition, the team achieved significant clock optimization through a novel routing approach, reducing clock tree latency and jitter by more than 50%. To maximize yield on the large 653mm² 5nm die, the physical layout included a spare slice architecture. Faulty slices identified through on-chip fuses can be seamlessly replaced during boot, improving overall production yield.
Finally, fast-tracked validation confirmed RNGD’s market-leading efficiency, delivering 2.7x better performance per watt than H100 and 4.1x better performance per watt than L40S. Overall, this collaboration demonstrates strong technical execution from concept to silicon and validates RNGD’s readiness for mass production.
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