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3D IC Track
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Demonstrating Synopsys Lane Test & Repair on TSMC Light IOs for Vertical 3DIC Solutions
Synopsys / TSMC
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Abstract
The joint Synopsys–TSMC work demonstrates the effectiveness of LTR when applied to TSMC Light I/Os, delivering robust end-to-end link quality for vertical 3DIC systems. The solution significantly improves yield, resiliency, and defect tolerance by enabling early defect detection, adaptive repair, and continuous monitoring throughout the product lifecycle.
This approach supports scalable and reliable deployment of next-generation 3DIC designs by addressing both manufacturing and in-field reliability challenges. Ultimately, it contributes to improved system performance, reduced failure rates, and enhanced overall product quality in advanced chiplet-based architectures leveraging TSMC Light I/O technology.
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Legal Notice
TSMC is not responsible for the content, accuracy, or reliability of any of the presentations at the TSMC Open Innovation Platform Ecosystem Forum. Furthermore, posting the presentation abstracts on TSMC's corporate website does not constitute an endorsement of the content of those presentations by TSMC. Any liability arising from the contents of any of the presentations is the responsibility of the presenter itself, and not TSMC.
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