 |
|
Analog, RF, Specialty Track 14:30 – 14:50
|
 |
M31 ultra-low power foundation IP solution on TSMC N12e Platform: Powering Edge AI and IoT applications
M31 Technology / Ambiq Micro
|
 |
Abstract
Leveraging on intelligent process-voltage-temperature optimization and ingenious design solutions from M31, the Memory IP was able to achieve ~25-30% better PPA (across area, power and performance) compared to existing solutions.
Also, the dual-rail memory design achieved VCCA (core supply) retention leakage within 5% of the per bit-cell retention leakage while achieving close to 500MHz frequency at extremely low periphery voltage (close to device threshold voltage limit) in low power mode. Initial instances developed achieved significant PPA improvements while complete compiler solution development is in-progress.
The standard-cell library offering achieved ~50% leakage power savings. Overall, these M31’s foundation IPs accelerate low-power design enablement on advanced nodes, providing best-in-class IP solution for next-generation AI, IoT and low-leakage computing platforms.
|
|
Legal Notice
TSMC is not responsible for the content, accuracy, or reliability of any of the presentations at the TSMC Open Innovation Platform Ecosystem Forum. Furthermore, posting the presentation abstracts on TSMC's corporate website does not constitute an endorsement of the content of those presentations by TSMC. Any liability arising from the contents of any of the presentations is the responsibility of the presenter itself, and not TSMC.
|
|
